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The effectiveness of Advanced Encryption Standard (AES) algorithm implementations on Field Programming Gate Array (FPGA) circuits is examined in this paper using Data Envelopment Analysis (DEA). DEA offers insights beyond conventional ratio analysis by examining various input-output scenarios, locating optimal practices, and maximizing resource allocation. We evaluate different implementations using the Charnes, Cooper, and Rhodes (CCR) model in the KNIME framework, emphasizing the significance of ongoing hardware security enhancement to address changing data protection concerns.
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